In manufacturing semiconductor integrated circuit devices, semiconductor wafers are subjected to various processes including a deposition process and so on. As one example of the deposition process, there is a CVD method which is a kind of vapor phase growth method. In the CVD method, a source gas serving as a source of a thin film is decomposed by a chemical reaction thereby solidifying the source gas and depositing it on a semiconductor wafer.
The CVD method typically includes two types, i.e., a thermal CVD method in which high-temperature heat is used to decompose the source gas and a plasma CVD method in which a decomposition promoting action caused by discharged plasma is used to decompose the source gas. In particular, the plasma CVD method is in wide use for low temperature processes since films can be formed at a temperature lower than that in the thermal CVD method. There is a plasma processing apparatus for forming thin films using the plasma CVD method as indicated below.
Such a plasma processing apparatus may be configured as a batch type capable of achieving a higher throughput than a single wafer type. In addition, the plasma processing apparatus may be configured as a vertical batch type to allow semiconductor wafers to be vertically stacked and accommodated in a process chamber. A vertical batch type plasma processing apparatus may be possible to achieve a higher throughput than a horizontal batch type plasma processing apparatus in which semiconductor wafers are horizontally arranged and accommodated in a process chamber.
High integration and miniaturization of semiconductor integrated circuit devices have been developed up to now. As described above, since a vertical batch type plasma processing apparatus is structured to vertically stack and accommodate semiconductor wafers in a process chamber, it can improve “throughput”. However, due to structural features, a subtle difference may occur in a deposition rate and/or film quality between semiconductor wafers disposed on upper stages of the process chamber and semiconductor wafers disposed on lower stages thereof.
Since such a subtle difference in the deposition rate and/or film quality lies within an allowable range, it may not act as a critical hindrance to the manufacture of semiconductor integrated circuit devices so far. However, in view of further development of the high integration and miniaturization in the future, such a subtle difference in the deposition rate and/or film quality may act as any hindrance to the manufacture of semiconductor integrated circuit devices.